/*+***********************************************************************************
 Filename: 9k_led\src\top.v
 Description: a simple led flash demo.

 Modification:
   2025.10.25 Creation   H.Zheng

Copyright (C) 2025  Zheng Hui (hzheng@gzhu.edu.cn)

License: MulanPSL-2.0

***********************************************************************************-*/

module top (
  input wire [1:0] button,
  input wire sys_clk,
  output wire [5:0] led
);

  //reset signals
  wire reset_n = button[1];


  reg [31:0] counter;
  reg tick;

  always @(posedge sys_clk) begin
    if (counter < 24'd1349_9999) begin      // 0.5s delay
      counter <= counter + 1'd1;
    end
    else begin
      counter <= 24'd0;
      tick <= ~tick;
    end
  end

  reg [4:0] counter_1s;
  always @(posedge tick or negedge reset_n) begin
    if (!reset_n) begin
      counter_1s <= 24'd0;
    end
    else begin
      counter_1s <= counter_1s + 1'd1;
    end
  end

  //output
  assign led = {button[0], ~counter_1s};

endmodule